Corresponding dependency and target lists in Makefile -

In a mess file, assume I have two similar dependencies and target lists, such as:

 Of course, my example is more complicated than this, but I want to know whether you have your goal, XO, Yo , GC relies on AxC, YC, JCC, respectively:   xo: xc yo: yc zo: zc    
 
 
 I think the question was that these goals How to create rules for each, how to  OBJS  to  SRC  (though it's good to do so!).  
 The easiest way is to use the rule already created, to know how to do it; You do not need to write your own just use:  
  all: $ (objs)   
 and they will all be prepared for you  CC By setting the variable  CPPFALGS  variable, and  CFLAGS , you can control the preprocessor flag by setting other compiler flags. Variable  
 If you really want to write your rule, then the pattern rule will be easy for you:  
 % O:% .c $ (CC) $ (CPP FALGS) $ (CFLAGS) -C-O $ @ $ & lt;