c - ARM Deliberately Bloating Compiled Code? -


While working on this issue, I have written the following C function as to how it will compile: 

  uint64_t lmul (uint32_t a, uint32_t b) {uint32_t hia = a & gt; & Gt; 16, Hib = B & gt; & Gt; 16, loa = (uint32_t) (uint16_t) one, function = (uint32_t) (uint16_t) b, less = loa * function, mid1 = hia * function, mid2 = loa * hib, mid = mid1 + mid2, high = hia * Hib; If (mid-> mid1) high = = 0x10000; Return ((uint64_t) high <; & lt; 32) + ((uint64_t) mid & lt; <16) + less; }   
 After compiling it with CodeWarrior with the ARM GCC compiler 4.7.3 (with the size optimization I'm using Freescale with dev board), this Changed to:  
  00000eac   
 What compiler do I not know is doing the last 40% of the function. It seems that it is playing music register for any other purpose than raising the size of the ceremony. Is there something like ARM, or is there some strange reason why I lack the ARM assembly expertise to understand?  
 If I do not make a mistake in the replacement, then the last half of the work  
  ecc: 0c19 LSRs r1, r3, # 16 ECE: 0418 lsls r0, r3, # 16 ED2: 2300 movs R3, # 0 ed8: 18a4 r0, can be represented by r0, R4 eda: 415d adcs r1, r3 ee6: 414b r1, r1, r6 eec: bd70 pop {r4, r5, r6 , Pc}  
 
 I have not used the codewire tool series, but I used the ARMCC compiler V 5.03.0.76, using it with uVision. Did it. The default option ( -sospace ) to optimize for space, and the generated code was still very ugly ... not even different from yours when I compiled with  -O2  looked like it's more what you would expect:  
  0x0000008A B570 PUSH {r4-R6, LR} 0x0000008C 0C02 LSRs r2, r0, # 16 0x0000008E 0C0C Elsars R 4, R 1, # 16 0x00000090 B 280 UX R R, R 0 0 9 002 B 289 UX R1, R1 0 0 0 0 9 4 4 4606 Mov R6, R0 0 0 0 0 0 9 6 4615 MOV R5, R2 0x00000098 434D MULS R 5, R 1, R 5 0x0000009 A 4360 Amayuels R 0, R 4, R0 0x0000009C 434E MULS r6, r1, r6 0x0000009e 182b ADDS r3, r5, r0 0x000000A0 4362 MULS r2, r4, r2 0x000000 A 2 42AB CMP R3, R5 0x000000 A 4D 202 BCS 0x000000AC 0x000000 A 6 2001 MOVS r0, # 0x01 0x000000 A8 0400 Elsels R 0, 0, 0, # 16 0x000000 AA 1812 ADDS R 2, R 2, R 0 0 0000000 AC 2400 Movis R 4 , # 0x00 0x000000 AE C19LSRS R1, R3, # 160x000000 B 04 0418 LSLS R, R3, # 16 0x000000 B2 1900 ADDS R, R, R 0 0 0 0 0 0 0 B 0 4151 ADCS R 1, R 1, R 2 0x000000B6 1980 ADDS r0, r0, r6 0x000000b8 4161 ADCS r1, r1, r4 0x000000BA BD70 POP {r4-r6, pc}   
 You have to Can try to compile with Uln options but I might suggest would you tell a go with the new compiler such as Mark Glace said about his comment.

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